Help with a VHDL code - using an array

Thank you very much for your reply!

I tried to simulate my code, but I didn't receive the result I wanted.

I wanted to create an array with integers range of 0 to a given limit. Do I always have to define a constant limit?

For example, if I want to create the same component but one with integers range 0 to 100 and the other one with range 0 to 200, do I need to create two VHDL codes, And change this single number in both of them?

As for the for loop, I have another component that generates a random number, and it changes with every clock cycle. If this condition is true, I want to exit the loop and try to fill this element of the array in the next clock cycle (so I don't go to the next element, meaning don't increase the counter), when I have a new random value. Does it make any sense?

I am beginner in VHDL coding. Thank you again for your help and attention!