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Altera_Forum's avatar
Altera_Forum
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10 years ago

Help needed in VHDL Testbench

Hi all, I have written the testbench file in such a manner that I need to perform updowncounting and downcounting based on the value of dir_s. But the problem is, when I execute the code, the di...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Your question is still not clear, can you please post some code that shows an error?

You can map anything to anything, you just have to connect things through ports...