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Altera_Forum's avatar
Altera_Forum
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9 years ago

Help needed in VHDL Testbench

Hi all, I have written the testbench file in such a manner that I need to perform updowncounting and downcounting based on the value of dir_s. But the problem is, when I execute the code, the di...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Sorry, I missread the code - But you still have the same error reported for two different assertions. maybe you should change the text so that it is clearer which one is firing then you can use the wave window to debug the problem..