help in sintax for various inputs to single internal signal vector binary and decimal

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hello,,, i have a problem,,

i need read 8 inputs from a digital encoder position d1,d2,d3,d4,d5,d6,d7,d8 : in std_logic, each with (0 or 1 state). but my problem is convert these inputs to a single signal : std_logic_vector(7 downto 0) in a internal signal in the (binary) in the order MSB is d8. then after this vector created to other single output (deci : out std_logic) in one data in decimal, of 0 to 255 Which is its equivalent.

any idea that help me in a simple code sintax

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Internal_signal <= d8 & d7 & d6 & d5 & d4 & d3 & d2 & d1;

this concatenation, and it has no cost on resource.