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Altera_Forum
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8 years ago

Help - Creating alarm clock with modulo counter - System verilog

I am trying to create an alarm clock using a Terasic CycloneV fpga. I need to be able to set the time and an alarm. Right now I'm unable to get the clock to reset at 24 hours. I have attached the mod...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

I suggest you need to work out a mechanism to reset the clock at the correct time. Have you tried drawing the circuit (on paper) to work out how you're going to connect the reset?