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YSada's avatar
YSada
Icon for New Contributor rankNew Contributor
7 years ago

helloworld issue on cyclone V

Hello, I'm trying to develop using Terasic C5P board, which has Cyclone V FPGA. And host pc is set up with Ubuntu 14.04 and Intel OpenCL 17.1. My problem is that I cannot program `/root/intelFPGA/1...
HRZ's avatar
HRZ
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

I have never used a PCI-E-attached Cyclone V board but for PCI-E-attached Stratix V and Arria 10 boards, after the initial programming via JTAG to enable the PCI-E core, the JTAG cable will not be required anymore (unless the PCI-E core breaks and JTAG reconfiguration is required again). Since diagnose is passing in your case, PCI-E transfer must be working correctly. However, for some reason, run-time FPGA reconfiguration seems to be going through JTAG instead of PCI-E. Unless Cyclone V does not support PCI-E-based reconfiguration, this should not happen.