HDL Testbench in ModelSim Altera Edition

Modelsim is a universal simulator - you can simulate code for any system.

I suggest pulling out the user guide and learning how to use it in command line mode - its quite straight forward and can be scripted for larger runs.

In the command line:

cd <your working directory>
# make the work library
vlib work
# compile all the files
vcom file1.vhdl
vcom file2.vhdl
# or if you have verilog
vlog file3.v
# now start a simulation
vsim my_top_level
# run it for some time
run 1 us
# start simulation over
restart -f

for other libraries, you can use vlib <libraryname> to create them

for already compiled libraries (in modelsim)

vmap <library_name> <path to library>

This is the base for all simulations. It will do you well to learn it.