Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

[HDL 9-806] Syntax error near "library IEEE".

I just started learning VHDL. The syntax I already have an my code is correct according to research I have done, but I keep getting this error that won't let me synthesis my code. I have pasted my co...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

The library declaration needs to be outside the module. Also, the 'timescale statement might not be legal. I'm not sure, but I never use them in files fed to Quartus. It should go in the test bench, not in synthesized code.