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Altera_Forum
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9 years ago

Hard DDR3 Controller Fitting Problem on Cyclone V

Hi I have generated the DDR3 controller IP from IP Catalogue, using Quartus Prime v15.1; It generated an example design project too. After I assign my DDR3 pins to the FPGA pins & run the "..._p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Thanks gj_leeson

My FPGA part is 5CEFA4F23. What was your FPGA part? This could help me understand if I am verifying everything correctly. Also I could verify if my problem is the same.

Actually this is somewhat strange to me. In the "External Memory Interface Handbook" on Table 1-7 the only Cyclone V parts which could support DDR3 controller are the following:

5CGTD9, 5CEA9, 5CGXC9, 5CEA7, 5CGTD7, 5CGXC7

My part (5CEFA4F23 with 484 pins) has not been listed there!

On the other hand on "Cyclone V Product Table" and "Cyclone V Device Overview" all parts of 5CE category support DDR3 Controllers!!!!

How did you identify the root of your problem?

Thank you