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Altera_Forum
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9 years ago

Hard DDR3 Controller Fitting Problem on Cyclone V

Hi I have generated the DDR3 controller IP from IP Catalogue, using Quartus Prime v15.1; It generated an example design project too. After I assign my DDR3 pins to the FPGA pins & run the "..._p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

I had a similar problem placing an LPDDR2 controller. In my case the package I chose (U484) would not support a X32 data width. I had to move to a F484 package. This was not obvious from the error messages.