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Altera_Forum
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8 years ago

Global memory access 512 bit width constrain?

Hi I'm building 2d fft for image processing from the design example provided by Altera, namely modify it to take advantage of Hermitian symmetric: use N/2 point fft to perform a N point real...
Altera_Forum's avatar
Altera_Forum
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8 years ago

Hi HRZ

Thank you for the reply.

I'm compiling for Arria 10 and I did see significant different (2 vs 50+2 as marked in the picture), and it did reflect latency when running on FPGA (512*512 2d FFT 0.8ms vs 2.5ms).

https://imgur.com/a/7eqlr

It's what the compiler think is best for you but in actual practice it's not optimal and programmer have to deal with it...:o