Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorGlitchs on a counter
Hi everybody I m facing a problem with quartus II and modelsim-altera. Here is my VHDL code : library ieee ;use ieee.std_logic_1164.all;
use IEEE.numeric_std.all;
--use ieee.std_logic_...
Altera_ForumHonored Contributor
Honored ContributorHere are a few tricks from an old timer: synchronous enabled design. It solves so many problems...
https://www.dropbox.com/s/8z2rgxvisni71y6/syncdesign2.pdf?dl=0 (image is worth a thousand words...) Cheers!
