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Altera_Forum's avatar
Altera_Forum
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16 years ago

getting compilation error

i m learning the Introduction to the Altera SOPC Builder Using VHDL Design

working on led display with switches example.

i followed every step as per instruction.i type the lights.vhd but at the time of compilation i m getting error like

Error (10500): VHDL syntax error at nios_system_inst.vhd(13) near text "nios_system_ins"; expecting "entity", or "architecture", or "use", or "library", or "package", or "configuration"

please tell me where is the problem

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    It is possible that the clock signal has a different name in nios_system.qip. Could you check in the generated nios_system_inst.vhd file?

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Well, that did the trick.

    Instead of clk, the generated nios_system_inst.vhd has clk_0.

    Thank you very much.

    Now, the next step would be using nios II.