Forum Discussion
PDone
Occasional Contributor
Occasional ContributorGet warnings when constraining Clock and Generated clocks
am trying to build the following.clock circuits. Although it works, I am not able to get the constraints to work:
Basically I have a 20 MHz input clock. This generates an 80 MHz clock which in turn...
sstrell
Super Contributor
Super ContributorThe warnings seem to indicate that the targets of your create_generated_clock commands are incorrect. Did you use the Name Finder (accessed from the timing constraint GUI dialog boxes) to search for the correct targets for get_pins?
The easiest thing to do would be to simply remove the create_generated_clock constraints and use derive_pll_clocks.
