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Honored Contributor
Honored ContributorGet value from output vector/ output 8 bit binary on 7 segment display
Hello all, I am trying to implement an eight bit carry look ahead adder. But my main issue is that I do not know how to output the sum which is an 8-bit out std_logic vector to a seven segment ...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- you have an internal signal called something like "sim_i", that connects to sum and read into this new output. You could also switch the compiler to VHDL 2008 and your original code will work just fine. --- Quote End --- Syntactically, How would I connect a "sim_i" to sum?
