Generic One-Hot Multiplexer

If you're happy to use VHDL 2008, you can avoid the annoying (IMO) std_logic_2d type:

--in a package:
type slv_array_t is array(integer range <>) of std_logic_vector;
....
entity combmuxs is
    generic (
        WIDTH_D        :    natural := 4 ;
        SIZE        :    natural := 16
       ) ;
    port (
        D        :    in    slv_array_t( SIZE - 1 downto 0)(WIDTH_D - 1 downto 0) ;
        Sel        :    in    std_logic_vector(SIZE - 1 downto 0) ;
        Q        :    out    std_logic_vector(WIDTH_D - 1 downto 0)  
        ) ;
    end combmuxs ;
architecture a of combmuxs is
    function smux3( d : slv_array_t ; sel : std_logic_vector)
        return    std_logic_vector
  is
    constant r : std_logic_vector( d(0)'range ) := (others=>'0');
  begin
    
    for i in d'range loop
      if (sel(i) = '1') then
        return d(i) ;
      end if ;
    end loop ;
    
    return r ;
    end function ;
begin
  process( D , Sel )
  begin
    Q <= smux3(D , Sel) ;
  end process ;
end architecture;