Generating a Simulation File for ATLPLL IP

Simulation setup script is for .ip and .qsys files. The Intel® Quartus® Prime software can generate a msim_setup.tcl simulation setup script for IP cores in your design. The script compiles the required device library models, compiles the design files, and elaborates the design with or without simulator optimization. Refer https://www.intel.com/content/www/us/en/docs/programmable/683870/22-1/modelsim-simulation-setup-script-example.html and https://www.youtube.com/watch?v=eviC0jP90ZA. Generate Simulation Setup Script for IP feature only in pro version.

DO file (simulation without nativelink) for executing several simulation commands like mapping library, source setup script, compile design files, add wave, vsim and etc. VO file

VO file is a functional netlist file. Refer https://www.intel.com/content/www/us/en/docs/programmable/683732/17-0/functional-results-simulate-the-ddr.html and https://www.intel.com/content/www/us/en/docs/programmable/683732/17-0/simulating-the-shift-clk-design-in-the.html simulation design examples.

For your case, I think you still need to create a testbench file to simulate the design. Can either simulate with nativelink or without nativelink.

Thanks,

Best Regards,

Sheng