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Altera_Forum's avatar
Altera_Forum
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14 years ago

Generate PWM signal

Hello everyone, I am new in fpga and right now I need to generate PWM signal. I do not understand how the following syntax work in order to generate PWM. 1. module PWM(clk, PWM_in, PWM_out)...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

I think it can if PWM_in is varied in time. But it needs some sort of control tracking of accumulator result.