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Altera_Forum
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18 years ago

generate clock with Quartus 7.1 web adition

Hello everyone, I've asked here before how can I make the FPGA generate a clock with Quartus 7.1. I read the user guide you told me and I used the MegaWizard Plug-In Manager (ALTPLL) in or...
Altera_Forum's avatar
Altera_Forum
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18 years ago

As complement I have the following error message when compiling in ModelSim:

# ** Warning: [1] C:/hard/src/ezPciE_pll.vhd(202): No default binding for component 'altpll'. (No entity named 'altpll' was found.)

That's quite odd, because all the entities are present, so are the librairies (including altera_mf)..