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Altera_Forum
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18 years ago

generate clock with Quartus 7.1 web adition

Hello everyone, I've asked here before how can I make the FPGA generate a clock with Quartus 7.1. I read the user guide you told me and I used the MegaWizard Plug-In Manager (ALTPLL) in or...
Altera_Forum's avatar
Altera_Forum
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18 years ago

I am going to work from a more basic level.

In general, you Cannot make the FPGA generate a clock.

You must provide a clock into the FPGa from something like an Oscillator, or from some other chip that can generate a clock source like a Dallas Semiconductor (now Maxim) clock source device.

YOu can then feed that clock into the FPGA for clocking elements in the FPGA.

From there, you can feed the clock into a PLL to generate many different clock outputs for use both internal to and external to the FPGA.

I hope this adds a little more clarity to your question.

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