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Altera_Forum
Honored Contributor
Honored ContributorGenerate an IP core using Quartus Standard Edition 30-days evaluation period
Hi, I have experience with other FPGA manufacturer and respective tools an now I have to send my VHDL code to other entity/person that will run in an INTEL FPGA (Stratix IV). That entity/pers...
Altera_ForumHonored Contributor
Honored ContributorI think features like partial configuration and netlist generation are only available with a full licence.
Any reason you cannot just provide the source code to the 3rd party?
