gate level simulation error

hi, i use DE0_NANO board, Quartus2 12.1sp and modelsim altera starter edition 10.1b.

Quartus2 setting -> EDA Tool Setting -> simulation : Modelsim-Altera Verilog HDL.

after that, full complie and tools -> run simulation tool -> gate level simulation. start modelsim. but

Error : (vsim-3170) Could not find 'D:/Work/simulation/../DE_NANO_default/simulation/modelsim/gate_work.DE0_NANO_Test".

how can i solve this problem? plz help me.