Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

FSM miley machine

I'm new to Verilog. I was trying to write the next Finite State Machines (miley machine) in Verilog: https://i.stack.imgur.com/9rvCj.jpg One of the attached file (called FSM.v) is the pr...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Please refer to State machine templates provided with Quartus Prime.

In your Verilog file do this.

Right click > Insert Template >

Navigate to Verilog HDL > Full Designs > State Machines > Select Mealy or Moore state machines and Insert code to your file.

Once you have a template feel free to modify this are per your requirement.

Hope this helps.

Best Regards,

arslanusman2003

(This message was posted on behalf of Intel Corporation)