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Altera_Forum
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8 years ago

FPGA(Opencl) code work well in emulator mode, but can't finish run on the FPGA

Hello： When I run my FPGA(OpenCL) code in emulator mode, the result is right; but after I create hardware configuration file and run on the FPGA, the code is blocked and can't fin...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

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Your observation is correct but there are a lot of unknown factors involved in the process. I recommend removing all the printf calls except the ones that are the beginning of your kernels.

If your host code is structured like this, it is correct (this is a pseudo code with shortened function names):

ClEnqueue(queue1, kernel1);

ClEnqueue(queue2, kernel2);

ClEnqueue(queue3, kernel3);

ClEnqueue(queue4, kernel4);

ClFinish(queue4);

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Hi, my host code is like this. I consulted an Intel FAE, he said my be caused by imbalance of write and read of channels! But I think, imlalance will not cause channel blocked, because I use buffered channel! What do you think?Tank you!