FPGA(Opencl) code work well in emulator mode, but can't finish run on the FPGA

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If your kernel still didn't work, I recommend removing the printfs (since it might cause deadlocks of its own) and also using "mem_fence(CLK_CHANNEL_MEM_FENCE)" to enforce channel ordering in kernels that have multiple channel reads/writes.

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I have add "mem_fence(CLK_CHANNEL_MEM_FENCE)" to my code. I forget to say just now.

But I considered that, in my code of last version, the printf information of kernel "weights_bias_in" can all printf out, so the kernel excute finished. That is to say, the other three kernels all start excute, read or write channels for many times before blocked. Especially for "conv", have been read “CONV1_WEIGHTS” for "num_feature_maps" times.

So, is not the problem of ordering of reading and writing of channels? Is the problem of FIFO(channel) confilict? Have you ever encounter the problem? Does Chaneel has the problem?I am not quite sure, so I also increaing the deapth of channel!