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Altera_Forum
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8 years ago

FPGA(Opencl) code work well in emulator mode, but can't finish run on the FPGA

Hello： When I run my FPGA(OpenCL) code in emulator mode, the result is right; but after I create hardware configuration file and run on the FPGA, the code is blocked and can't fin...
Altera_Forum's avatar
Altera_Forum
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8 years ago

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1) Is there any error output?

2) What hardware are you using?

3) Did you use a reference design?

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Thank you for reply!

1)There is no erroroutput.

2)Xeon + Arria10

3)I refer to Altera's channel exampls!

Do you know any method to debug the code?