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Altera_Forum's avatar
Altera_Forum
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12 years ago

FPGA multiplication using Verilog

I am new here. For FPGA multiplication in Verilog, do I need to extend the sign bit for signed numbers before I do the multiolication? Or, there is a library that could take care of this part for me automatically just as how we do the multiplication using VHDL?

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    You just need to declare the inputs and outputs as signed types and the appropriate hardware will be created. Take a look at the verilog templates built into Quartus, I recall seeing a signed multiplier being included.