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Altera_Forum's avatar
Altera_Forum
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9 years ago

Force synthesis to fail if RAM cannot be inferred?

Hi, we have a design where there are a few large memories, declared as verilog reg[][]'s, which must be implemented as M9Ks. The design can't possibly fit the device or meet timing if they are imple...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Quartus has several templates designed to infer memory. If you use one of them you will get memory unless there is a problem. You should pick the template that suits your needs and you will automatically have memory inferred if at all possible. You will need to use the GUI because the templates are in the editor.