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Altera_Forum
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13 years ago

For loop

hello I want to check an array. which one is quicker? using for loop or using a counter that counts up at the "posedge" of the clock. thanks
Altera_Forum's avatar
Altera_Forum
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13 years ago

Your posts here indicate a fundamental misunderstanding about what Verilog HDL is. When you use Verilog to program an FPGA the Verilog code is not at all like a software language such as C or Basic. Instead, the Verilog code describes a hardware system composed of flip-flops, logic gates, etc. It does not tell the FPGA to execute Verilog statements. The FPGA is not a microprocessor that executes lines of code sequentially.