Forum Discussion
Altera_Forum
Honored Contributor
Honored Contributor"For... Loop" simulates differently then discrete assignments?
Can someone help me understand why the first code snippet works as I would expect it, but the second snippet simulation holds all values at 'U'? Note: WRITE_ENABLE_FIBRE_REG(0) is assigned in a di...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- you MUST assign ALL bits for that signal inside the process. This is why your temporary version works, as you do assign WRITE_ENABLE_FIBRE_REG_TEST inside the loop. --- Quote End --- Thanks, that is interesting. I'm surprised I didn't see a 'multiple driver' warning or something similar. At least I'll know to avoid doing that going forward.
