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Altera_Forum
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10 years ago

For better simulation performance what mode of ALTPLL is recommended?

Hello, I am working on a FPGA as functional verification engineer. We are using ALTPLL in our simulation and it is currently using more than 60% of simulator resources (altera_mf.v). Do you ...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Keep things simple and just don't instantiate the ALTPLL in your simulation model; substitute it wholesale with your generated clocks.