Forum Discussion
KennyT_altera
Super Contributor
6 years agoDid see the failure in the platform designer interconnect? If yes, there are 3 ways to solve it
1) in qsys -> press system -> show system with interconnect -> memory mapped interconnect -> manually add register there
2) in your qsys, add pipeline register module
3) go to interconnect requirement-> limit interconnect requirement -> increase it
Qsys automatic add adapter when there are mismatch btw the avalon. You cannot simply remove those adapter as it will cause your function to be broken. Thanks