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PKhan8's avatar
PKhan8
Icon for New Contributor rankNew Contributor
6 years ago

Fitter error: 14566

I got an error 14566 : Could not place 1 periphery component(s) due to conflicts with existing constraint (1 fractional PLL(s)).

How can i fix it?

Thanks.

4 Replies

  • sstrell's avatar
    sstrell
    Icon for Super Contributor rankSuper Contributor
    6 years ago

    Without knowing anything about the design or even the target device, it's not really possible to diagnose this. Can you provide more details or post the project?

    You can also expand the error message to see exactly what the conflict is.

    #iwork4intel

  • AnandRaj_S_Intel's avatar
    AnandRaj_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    6 years ago

    Also, if possible share your design which will be ease our job of replicating the scenario.

  • PKhan8's avatar
    PKhan8
    Icon for New Contributor rankNew Contributor
    6 years ago

    Excuse me, this is projet which got error above.

    I got this error after i had assigned PINs to implement it on DE1_SoC_mtl2(CycloneV) Kit

    Can you help me fix it, please?

    Sorry for my bad English

    • AnandRaj_S_Intel's avatar
      AnandRaj_S_Intel
      Icon for Regular Contributor rankRegular Contributor
      6 years ago

      ​Hi @PKhan8​ ,

      Check clk_50 pin assignments.

      Clock pin should be AF14/AA16/Y26/K14.

      After changing the clock pin, I can run fitter successfully.

      Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

      Regards

      Anand