Forum Discussion

NSona1's avatar
NSona1
Icon for New Contributor rankNew Contributor
7 years ago

Fatal: (vsim-3807) Types do not match between component and entity for port "dataout".

The error shown is- The following is the error shown ** Fatal: (vsim-3807) Types do not match between component and entity for port "dataout". # Time: 0 ps Iteration: 0 Instance: /lineartau_1_vhd...
Vicky1's avatar
Vicky1
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

Test bench is generated using "Start Test Bench Template Writer" and its template so in this case it needs to be edited like below,

SIGNAL dataout : integer range -128 to 127; -- at signals

dataout : OUT integer range -128 to 127 --- at COMPONENT lineartau_1

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards

Vikas Jathar

(This message was posted on behalf of Intel Corporation)