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Divya_Mulpuri's avatar
Divya_Mulpuri
Icon for New Contributor rankNew Contributor
3 years ago

FAILURE: Simulation stopped due to Fatal error

Hi all, I am working on PCI-e design example where I tried to generate pci ip . When I tried to simulate via questa sim, I am getting fatal error due to BAR disabled. Please help me in resolving ...
Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


Apologize for late reply.

Can I know which design example you are using?

If you have time can you please try out some design example in Intel FPGA store and see if the error is replicable ?

https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/design-store.html?s=Newest&q=pcie&f:guidetm83741EA404664A899395C861EDA3D38B=%5BIntel%C2%AE%20Arria%C2%AE%5D


Do you try to configure the BAR before you try out the problem

Please check the user guide Session 6.8.3 Examples of Reading and Writing BAR0 Using the CRA Interface, to ensure everything is well set.

https://www.intel.com/programmable/technical-pdfs/683724.pdf


Let me know if you still facing the same problem.

Regards,

Wincent_C_Intel