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dsun01's avatar
dsun01
Icon for Contributor rankContributor
4 years ago
Solved

exec elab_debug error

Dear Support, I have a project from Texas Instruments. I am learning how to port it to Intel A10 GX development board. I use Quartus Pro 21.3 Generate Simulator Setup Script created a TCL. and i...
  • IntelSupport's avatar
    IntelSupport
    4 years ago

    Hi David,


    Thanks for the project file. I will try to replicate the issue and update to you.


    Regards,

    Pavee


dsun01's avatar
dsun01
Icon for Contributor rankContributor
4 years ago

Dear Support,

In the msim_setup.tcl in the last post. there are few places I don't understand.

1. the TCL assigne loopback_fifo as the top_level_name. I don't understand why, loopback_fifo is just one the IP used in the system, not top testbench. can I change it to the real top level testbench.?

if ![info exists TOP_LEVEL_NAME] {
set TOP_LEVEL_NAME "loopback_fifo.loopback_fifo"
}

2. how do I add the testbench_top.v to the .tcl where should I put the testbench_top.v file so the .tcl will find it.

thanks,

David