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Altera_Forum
Honored Contributor
8 years agoestimate total pipeline latency for kernel
Hi, I'm new to using Intel's OpenCL SDK for FPGAs . I'm developing a single work-item kernel and I'm experimenting with code changes and would like to see the effect of these changes on my to...
Altera_Forum
Honored Contributor
8 years agoFor a pipeline depth of P, a loop trip count of L, and an initiation interval of I, the execution time of the pipeline in clock cycles is:
P + (L - 1) * I You can calculate the execution time of each block separately using this formula, and just add them up to get the total number of cycles. Dividing that by operating frequency will give you the total run time in seconds. Of course this does not take stalls from channel and global memory operations into account. It not easy to model such stalls.