errors in qsys migrating from quartus 15.1 to 16.0

Hi,

A project that works in quartus 15.1 and that generates the hdl without any issue in quartus gives me errors in qsys (started from quartus 16.0). There are no issues in the message window of qsys, but when I hit the generate button, I get the following errors. (I did all kinds of searches on migrating from 15.1 to 16.0 and I didn't find anything obvious)

...

Info: MyMODULE: softresetEnable = 1

Info: MyMODULE: Starting RTL generation for module 'HsStdSopc_altera_avalon_dma_160_z7au5ti'

Info: MyMODULE: Generation command is [exec C:/altera/16.0/quartus/bin64//perl/bin/perl.exe -I C:/altera/16.0/quartus/bin64//perl/lib -I C:/altera/16.0/quartus/sopc_builder/bin/europa -I C:/altera/16.0/quartus/sopc_builder/bin/perl_lib -I C:/altera/16.0/quartus/sopc_builder/bin -I C:/altera/16.0/quartus/../ip/altera/sopc_builder_ip/common -I C:/altera/16.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_dma -- C:/altera/16.0/quartus/../ip/altera/sopc_builder_ip/altera_avalon_dma/generate_rtl.pl --name=HsStdSopc_altera_avalon_dma_160_z7au5ti --dir=C:/Users/ian/AppData/Local/Temp/alt7305_7765832829324857051.dir/0272_MyMODULE_gen/ --quartus_dir=C:/altera/16.0/quartus --verilog --config=C:/Users/ian/AppData/Local/Temp/alt7305_7765832829324857051.dir/0272_MyMODULE_gen//HsStdSopc_altera_avalon_dma_160_z7au5ti_component_configuration.pl --do_build_sim=0 ]

Info: MyMODULE:# 2017.05.19 12:55:57 (*) HsStdSopc_altera_avalon_dma_160_z7au5ti: allowing these transactions: word, hw, byte_access

Info: MyMODULE:

Info: MyMODULE: WARNING:

Info: MyMODULE: Could not find a signal named (19)! at C:/altera/16.0/quartus/sopc_builder/bin/europa/europa_utils.pm line 248.

Info: MyMODULE:

Info: MyMODULE: WARNING:

Info: MyMODULE: Could not find a signal named (19)! at C:/altera/16.0/quartus/sopc_builder/bin/europa/europa_utils.pm line 248.

Info: MyMODULE:

Info: MyMODULE: WARNING:

Info: MyMODULE: Could not find a signal named (19)! at C:/altera/16.0/quartus/sopc_builder/bin/europa/europa_utils.pm line 248.

Info: MyMODULE:

Info: MyMODULE: WARNING:

Info: MyMODULE: Could not find a signal named (19)! at C:/altera/16.0/quartus/sopc_builder/bin/europa/europa_utils.pm line 248.

Error: MyMODULE: Failed to generate module HsStdSopc_altera_avalon_dma_160_z7au5ti

Info: MyMODULE: Done RTL generation for module 'HsStdSopc_altera_avalon_dma_160_z7au5ti'

Error: Generation stopped, 51 or more modules remaining

Info: HsStdSopc: Done "HsStdSopc" with 37 modules, 9 files

Error: qsys-generate failed with exit code 1: 2 Errors, 0 Warnings

Info: Finished: Create HDL design files for synthesis