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Altera_Forum's avatar
Altera_Forum
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11 years ago

Error while debugging using system-console

Hi, I am trying to debug a design containing Nios II on a Stratix V FPGA. When debugging with system-console, while trying to do a memory read, i get the following error : % master_read_me...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Are you getting any error if reading other module's register mapping in your design? Where did you get the RAM controller?