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CPaul's avatar
CPaul
Icon for New Contributor rankNew Contributor
7 years ago

Error: (vsim-3732) The following component port is not on the entity: # IR31_to_26

Hello, I am trying to create a testbench for a mips processor in VHDL. It compiles fine in quartus and in modelsim but when I try to start the simulation I get this error. * Error: (vsim-3732) D:/Q...
CPaul's avatar
CPaul
Icon for New Contributor rankNew Contributor
7 years ago

@Anand​

I got the simulation to run. However I am getting many undefined values and my clock is not clocking. Is this the same results you got?

  • AnandRaj_S_Intel's avatar
    AnandRaj_S_Intel
    Icon for Regular Contributor rankRegular Contributor
    7 years ago

    ​Hi @CPaul,

    Yes, I was able to see the clock running.

    1. Uninitialized out port has no driver check your design and its mapping.
    2. place week2_demo.mif in simulation directory.

    Regards

    Anand