Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

ERROR: positive-number required for log2

I'm trying to design an SOPC component that has an avalon-slave interface, and two master interfaces. The slave interface goes to the Nios, and the master interfaces (will) be connected to the SDRAM that is shared with the Nios. The idea is to have a more advanced method of DMA (as well as interfacing with an off-chip component) that will allow hardware-based queuing of DMA transactions -- something which (as far as I can tell) cannot be done with Altera's DMA Controller component. Unfortunately, whenever I connect the master interfaces to SDRAM, even with a bare-bones entity-only vhdl file, I get the error:

(*) Making arbitration and system (top) modules.
ERROR:
positive-number required for log2 not (-2147483648)
255

SOPC Builder then goes on to tell me that system generation was successful, but it actually was not.

Has anybody encountered this before? The error goes away if I disconnect my master interfaces.

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    log2 is often used to calculate counter bit widths from maximum count value and similar. It's probably an auxilary function somewhere in the SOPC IP core. The error is most likely ocurring, cause a parameter has an illegal value or is simply missing.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    log2 is often used to calculate counter bit widths from maximum count value and similar. It's probably an auxilary function somewhere in the SOPC IP core. The error is most likely ocurring, cause a parameter has an illegal value or is simply missing.

    --- Quote End ---

    Seems as though you are right. I reduced the width of the burstcount signal from 32 to 16 on the write-master and the error went away. Interestingly enough, the burstcount on my read-master is still 32 bits wide, and does not generate an error.

    I'm not overly concerned about the reduced burst size (2^16 is still much larger than I need), but I am still curious as to why this is happening. According to the documentation (http://www.altera.com/literature/manual/mnl_avalon_spec.pdf), a signal width of 32 bits is acceptable.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Yes, generating an unspecified error message could be regarded as a SOPC builder bug in any case. You should send a service request.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Strange, if you specify a number of bits, the software should not need the log2 anymore to calculate the width.

    Stefaan
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    Strange, if you specify a number of bits, the software should not need the log2 anymore to calculate the width.

    --- Quote End ---

    You would have to look at the particular IP, to understand where it's actually needed.

    The function is often used in parameterizable HDL components/modules, could be that a bitwidth parameter is converted to a range respectively a factor and back to a bitwidth at another code location. And of course, input parameters should be explicitely range checked by the core if the range is limited.