Forum Discussion

ETsac's avatar
ETsac
Icon for New Contributor rankNew Contributor
7 years ago

Error message while trying to compile a project with one LVDS output.

Hi, i have been trying to test LVDS functionality by creating an output as reg (not wire) and then setting its' val with a non-blocking assignment inside an always loop. I started by creating a sin...
ETsac's avatar
ETsac
Icon for New Contributor rankNew Contributor
7 years ago

Hi again, i am very sorry for this but it seems that i have not been doing enough reading. I am at the very beginning of this so please accept my apologies. I have not been using the correct IO banks.

LVDS works fine as long as the correct bank is selected and by saying that i mean that the appropriate pins (that belong to the correct bank) must be chosen.

There is a reference on that in the cyclone IV handbook page 123/490 where the definitions of banks with their supported standards.

Could you pls still try to answer my DE0-nano-related questions?

Thanks and Regards

Manos