Error message while trying to compile a project with one LVDS output.

Hi,

I obviously forgot to mention that i am using DE0-nano which has a cyclone IV E EP4CE22F17C6N FPGA.

I was able to solve the issue by selecting LVDS_E_3R instead of the LVDS. All i wanted was to just pass the clock to the LVDS output and measure it with my scope.

The error message itself proposed that solution which i saw later on (after posting my first message).

Is this supposed to be a solution? I mean, is it normal for plain LVDS to NOT work as an output?

By the way, what are the chances that the DE0-nano can work with a 500MS/s plugged in on a pcb that i am planning to design?

I know that the DE0-nano pcb is not optimised for that high speed.

I basically have 2 options:

I am designing a 12bit 125MS/s dso with 2 channels (at the moment - 4 ch. latter).

The ADC can transmit (1) DDR data over 6 LVDS-pairs at 250MHz through each dedicated output or (2) use one output to transmit both channels data at 500MHz.

If i choose the first method i have to connect 24 pins between the ADC and FPGA or 12 pins if i use the second method.

I know that terminations and proper pcb design are key elements to minimize reflections and signal distortion.

What do you think, would this work?

If this is a dead end i obviously have to consider including the FPGA in my pcb design which is a headache but i will have to do it.

Your suggestions will be highly appreciated

Thanks and regards

Manos Tsachalidis