Forum Discussion
Nurina
Regular Contributor
3 years agoHi,
I think this syntax is only available in SystemVerilog. Make sure your RTL File is .sv format so you can use this syntax.
Reagrds,
Nurina
Hi,
I think this syntax is only available in SystemVerilog. Make sure your RTL File is .sv format so you can use this syntax.
Reagrds,
Nurina