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Altera_Forum
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9 years ago

Error 332000 when using DCFIFOs in Qsys during build

I received this error message in Quartus Prime Lite 16.1 when attempting to add a dual-clock FIFO to Qsys on a DE2i-150 example project. I tested this with the DE2i-150 PCI-E Fundamental example proj...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hello,

Is anyone found the cause of this bug and how to solve it? I'm facing the same issue and I tried version v17, v17.1 and v18. Always the same message occur.

Thanks.

Raph