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Altera_Forum
Honored Contributor
9 years agoError 332000 when using DCFIFOs in Qsys during build
I received this error message in Quartus Prime Lite 16.1 when attempting to add a dual-clock FIFO to Qsys on a DE2i-150 example project. I tested this with the DE2i-150 PCI-E Fundamental example proj...
Altera_Forum
Honored Contributor
8 years agoHi Kentan,
Thank you for your response. I solved this by building in Quartus 15.0 as DJ mentioned above. Regards, Aidan