Forum Discussion
Hello,
I am porting OpenCL Stratix 10 BSP onto 1SG1100 based custom board (instead of 1SG2800) from the stratix 10 development board bsp. I have successfully generated by flat bsp flow. However when switch to base bsp flow I am receiving 4 19724 errors from the fitter. I have updated clock region as SX0 SY0 SX6 SX7 as reported by the flat bsp flow as maximum (It was SX8 SX11 for the 1SG2800 which I did not change initially). I am using Quartus 20.4.
The tail of the base fit.log is follows:
Info (11178): Promoted 15 clocks
Info (18386): freeze_wrapper_inst|board_kernel_reset_reset_n_reg (237 fanout) drives clock sectors (0, 0) to (6, 7)
Info (18386): board_inst|kernel_clk_gen|kernel_clk_gen|kernel_pll|stratix10_altera_iopll_i|outclk[1] (7 fanout) drives clock sectors (0, 0) to (6, 7)
Info (18386): board_inst|kernel_clk_gen|kernel_clk_gen|kernel_pll|stratix10_altera_iopll_i|outclk[0] (95249 fanout) drives clock sectors (0, 0) to (6, 7)
Info (18386): auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|jtagpins|atom_inst|atom (120 fanout) drives clock sectors (0, 0) to (3, 3)
Info (18386): board_inst|mem|mem_ddr4_s10|mem_ddr4_s10|arch|arch_inst|io_tiles_wrap_inst|io_tiles_inst|core_clks_from_cpa_pri_nonabphy[0] (23145 fanout) drives clock sectors (0, 1) to (1, 7)
Info (18386): board_inst|pcie|pcie|hip|altera_pcie_s10_hip_ast_pipen1b_inst|altera_pcie_s10_hip_ast_pllnphy_inst|g_phy_g3x8.phy_g3x8|phy_g3x8|altera_xcvr_hip_channel_s10_ch0|altera_xcvr_pcie_hip_channel_s10_ch0|g_xcvr_native_insts[0].ct2_xcvr_native_inst|inst_ct2_xcvr_channel_multi|gen_rev.ct2_xcvr_channel_inst|out_pld_pcs_tx_clk_out1_dcm (69655 fanout) drives clock sectors (0, 0) to (0, 7)
Info (18386): auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|intosc|clk (2404 fanout) drives clock sectors (0, 0) to (3, 1)
Info (18386): config_clk (2423 fanout) drives clock sectors (0, 0) to (1, 3)
Info (18386): board_inst|mem_0|mem_ddr4_s10|mem_ddr4_s10|arch|arch_inst|io_tiles_wrap_inst|io_tiles_inst|core_clks_from_cpa_pri_nonabphy[0] (23139 fanout) drives clock sectors (0, 4) to (1, 7)
Info (18386): board_inst|mem|reset_controller_ddr4a|reset_controller_ddr4a|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out (168 fanout) drives clock sectors (0, 4) to (0, 7)
Info (18386): board_inst|mem_0|mem_ddr4_s10|mem_ddr4_s10|arch|arch_inst|non_hps.core_clks_rsts_inst|reset_sync_pri_sdc_anchor (18 fanout) drives clock sectors (0, 4) to (0, 7)
Info (18386): pll_ref_clk (31 fanout) drives clock sector (0, 3)
Info (18386): board_inst|pcie|pcie|hip|altera_pcie_s10_hip_ast_pipen1b_inst|altera_pcie_s10_hip_ast_pllnphy_inst|g_phy_g3x8.phy_g3x8|phy_g3x8|altera_xcvr_hip_channel_s10_ch0|altera_xcvr_pcie_hip_channel_s10_ch0|g_xcvr_native_insts[0].ct2_xcvr_native_inst|inst_ct2_xcvr_channel_multi|gen_rev.ct2_xcvr_channel_inst|out_pld_pcs_tx_clk_out2_dcm (4 fanout) drives clock sector (0, 0)
Info (18386): board_inst|mem|rst_controller_002|alt_rst_sync_uq1|altera_reset_synchronizer_int_chain_out (91 fanout) drives clock sector (0, 3)
Info (18386): auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|s10xcvrfabric|osc_clk_in_int (88 fanout) drives clock sector (0, 0)
Info (11888): Total time spent on timing analysis during Physical Synthesis is 0.00 seconds.
Info (170189): Fitter placement preparation operations beginning
Critical Warning: Compiling with slowed OpenCL Kernel clock. This is to help achieve timing closure for board bringup.
Info: Adding default timing constraints to JTAG signals. This will help to achieve basic functionality since no such constraints were provided by the user.
Info (19727): Fitter will now perform the packing at high effort level
Info (19727): Fitter will now perform the packing at the highest effort level
Error (19724): Fitter requires 32 LABs for |_3 region in locations from lower-left (11, 4) to upper-right (30, 291), but only 0 LABs are available exclusively for that region
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|pcie|pcie|dcore|dma_ctrl|rd_control|status_control_reg|rc_dma_addr_low[5]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|pcie|pcie|dcore|dma_ctrl|wr_control|status_control_reg|ep_dma_addr_low[5]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|mm_interconnect_15|dma_pr_reordering_buffer_0_s_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[11]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|mm_interconnect_15|dma_pr_reordering_buffer_0_s_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|in_data_reg[10]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|pcie|pcie|dcore|sch|rx|rxhipif|dly0|dreg[164]"
Error (19724): Fitter requires 201 LABs for |_9_LOGIC_MODULE_0_10 region in locations from lower-left (12, 4) to upper-right (30, 291), but only 0 LABs are available exclusively for that region
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|kernel_ddr4a_bridge|board_mm_bridge_s10_0|rsp_readdata[1][431]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|kernel_ddr4a_bridge|board_mm_bridge_s10_0|rsp_readdata[1][422]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|kernel_ddr4a_bridge1|kernel_ddr4a_bridge1|rsp_readdata[1][73]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|kernel_ddr4a_bridge1|kernel_ddr4a_bridge1|rsp_readdata[1][68]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|mem_0|acl_hyper_optimized_ccb|acl_hyper_optimized_ccb|cmd_dcfifo|mem[22].wdata_m[7]"
Error (19724): Fitter requires 82 LABs for |_8 region in locations from lower-left (12, 40) to upper-right (30, 291), but only 0 LABs are available exclusively for that region
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|mem|mm_interconnect_0|agent_pipeline_001|gen_inst[0].core|data1[17]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|mem|mem_ddr4_s10|mem_ddr4_s10|arch|arch_inst|hmc.amm.amm.data_if_inst|amm_readdata_0[17]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|mem|mem_ddr4_s10|mem_ddr4_s10|arch|arch_inst|hmc.amm.amm.data_if_inst|amm_readdata_0[406]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|mem|mm_interconnect_0|agent_pipeline_001|gen_inst[3].core|data1[22]"
Info (19797): The following node of the above-mentioned region failed to pack: "board_inst|mem|mm_interconnect_0|mux_pipeline_001|gen_inst[1].core|data1[1]"
Error (19724): Fitter requires 1 LABs for |_11 region in locations from lower-left (11, 4) to upper-right (30, 147), but only 0 LABs are available exclusively for that region
Info (19797): The following node of the above-mentioned region failed to pack: "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen.real_sld_jtag_hub|mix_writedata[0]"
Info (19797): The following node of the above-mentioned region failed to pack: "auto_fab_0|alt_sld_fab_0|alt_sld_fab_0|sldfabric|jtag_hub_gen.real_sld_jtag_hub|identity_contrib_shift_reg[0]"
Info (170190): Fitter placement preparation operations ending: elapsed time is 00:09:19
Info (11888): Total time spent on timing analysis during Global Placement is 50.51 seconds.
Info (20274): Successfully committed placed database.
Error: An error occurred during placement
Error: Quartus Prime Fitter was unsuccessful. 5 errors, 73 warnings
Error: Peak virtual memory: 17560 megabytes
Error: Processing ended: Wed Dec 21 12:16:33 2022
Error: Elapsed time: 00:29:07
Error: System process ID: 10744
Info (19538): Reading SDC files took 00:00:17 cumulatively in this process.
Thank you for your time
Best regards
Bulent CANDAN