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The MAX10 clock inputs are also useable as general IO, but pin distance rules have to be observed.
You didn't tell why you wanted to use the said pins as SCK output. Technically, you'd either use any suitable IO pin, or in case of very critical timing (unlikely for SPI interface), a dedicated PLL output pin.
If you have already finished a PCB and want to check if the SCK output at pin 26 actually disturbs the input clock, you can disable the fitter check by specifying a TOOGLE_RATE of 0MHz for the pin in the pin planner or assignment editor.
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As you have guessed, I have already finished the PCB and my SCK output is on pin 26, while quartz oscillator input is on pin 27. How exactly can I specify the TOOGLE_RATE, and how is this solving the problem? Sorry for the amateur questions.
Also, where can I get some documents explaining the pin distance rules you mentioned.
Cheers,
Milos
Honored Contributor
