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Altera_Forum
Honored Contributor
8 years agoError (10759) when compile boardtest.cl kernel
when i run to compile boardtest.cl kernel, have the bellow error : error (10759) the verilog hdl error at boardtest_system.v :object kclk_finish declared in a list of port decralation cannot be rede...
Altera_Forum
Honored Contributor
8 years agoyes,i'm using quartus 17.1version while the BSP version of de1soc board is 16.0. but the de1-soc opencl user manual file don't write that bsp only install under quartus v16.0,so i'm not sure that error was caused by different version...