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Error (10500): VHDL syntax error at neural_processor.vhd(356) near text "case"; expecting "if"
Could be a second version like:
Error(1): VHDL syntax error in keyword "case" at line xxx, missing a "end case"
or
Error(2): VHDL syntax error in keyword "if" at line xxx, missing a "end if"
Is hard to make that? No, it is not!
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Syntax errors are the lowest level of possible code faults, and the kind of errors that can be most easily located and fixed. I see two possible reasons why a syntax error of the said kind (expecting "if" instead of "case") might cause headache:
- you are really new to VHDL
- it's appearing in a large code block with nested "if" and "case" constructs.
Your both suggestions are in my view more confusing than the original error message. Error(1) is just inappropriate, error(2) is only halfway correct. The error is a missing "end if", but it's not an "error in keyword if". The compiler is exactly reporting what it sees: It has an open "if" block which must be closed before a (possibly) correct end case.
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I remember how i solved this problem and i will tell you:
I broke about 1500 lines of code in 750. I compiled and chose the bad part.
I broke again in two parts of 375 and did it again, and again, and again until: "Oh i forgot a semicolon here...". Now tell me: Where is my fault? Have I "poor knowledge of VHDL" like you said just because i forgot a semicolon, or a "end case"? Is It serious?
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If the actual error is a missing semicolon, the error message would look like
Error (10500): VHDL syntax error at Range_I.vhd(227) near text "IF"; expecting ";", or an identifier ("if" is a reserved keyword)
Error (10500): VHDL syntax error at Range_I.vhd(232) near text "CASE"; expecting "if"
Error messages should be always decoded (and fixed) top-down. Either you omitted the first error message, or the case is a bit different.
The solution description suggests that besides not exactly reading the error message the problem is probably not well structured and indented code.
I admit that a verbose error message could explain about the open if block and also tell the line number of related unmatched "if". I'm not aware of a VHDL tool doing so. In a well structured and indented text, the actual error location can be quickly found without it.
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